1. Field of the Invention
This invention relates to a semiconductor device structure, and more particularly to a semiconductor device protective structure and method for fabricating the same, the semiconductor device structure can avoid the die or substrate from cracking due to the side of the die or substrate collided with an external object.
2. Description of the Prior Art
Typically in the electronic component world, integrated circuits (IC's) are fabricated on a semiconductor substrate, known as a chip, and most commonly are made of silicon. The silicon chip is typically assembled into a larger package which serves to provide effective enlargement of the distance or pitch between input/output contacts of the silicon making it suitable for attachment to a printed circuit board, and to protect the IC from mechanical and environmental damage. With the trend moving to more and more features packed into decreasing product envelopes, utilizing ever smaller electronic components to improve upon size and feature densification a constant and formidable challenge is presented to manufacturers of consumer and related articles.
Chip scale packages (CSP) were developed to provide an alternative solution to directly attached flip chips devices. These packages (CSP) represent a new miniature type of semiconductor packaging used to address the issues of size, weight, and performance in electronic products, especially those for consumer products such as telephones, pagers, portable computers, video cameras, etc. Standards have not yet been formalized for CSP, and as a result, many variations exist, and several of which are described in “Chip Scale Package”, cited above. In general, the chip is the dominant constituent of a CSP with the area of the package, being no more than 20% greater than the area of the chip itself; but the package has supporting features which make it more robust than direct attachment of a flip chip.
As shown in FIG. 1, it is a side view of a flip chip device 100 according to prior art. The flip chip 100 includes a die 102 with metal pads 105 that typically has a conventionally fabricated IC device structure. The die 102 has a plurality of electrical contacts 104, such as redistribution layer (RDL) trace. Bumps 103, such as solder balls, are formed on the electrical contacts 104. A protection layer 106 covers the electrical contacts 104 to expose the electrical contacts 104 for allowing the solder balls 103. Moreover, a protective film 101 is applied to the bottom surface of the die 102.
The protective film 101 may be formed from any suitable material. For example, the protective film 101 may be formed from a plastic material or epoxy. This epoxy is commonly also used as a glob top material for chip-on-board applications that protects the die 102 and wire bonds. The protective film 101 may have any thickness that substantially prevents chipping during the dicing operation and is suitable for the particular application. For example, the protective film 101 may have a thickness that allows laser marking of the thick film without the laser penetrating the thick film. Preferably, the protective film 101 is between about 1.5 and 5 mils. Most preferably, the protective film is between about 2 and 3 mils.
Furthermore, the substrate of the flip chip or semiconductor device (such as integrated circuit's) has a friability property such that these devices are easily result in cells edge of the wafer fail due to the substrate being lateral damage or cracking owing to the side of the die or the substrate colliding with an external object or applied by an lateral external force. Therefore, the reliability or the life time of the flip chip or semiconductor device will be decrease.
In view of the aforementioned, the present invention provides an improved semiconductor device structure to overcome the above drawback.